The present invention relates to semiconductor devices and more particularly to technology useful for a semiconductor device with a FINFET.
In recent years, in the field of LSI (Large Scale Integration) which uses silicon, there has been a growing tendency toward reduction in the size of a MISFET (Metal Insulator Semiconductor Field Effect Transistor) as a constituent element of LSI, particularly in terms of the gate length of a gate electrode. The efforts to reduce the MISFET size have been pursued in accordance with the scaling law. However, as the device generations advance, various problems have emerged and it is difficult to suppress short-channel effects in MISFETs and at the same time, achieve high current driving power. With this background, research and development of new structure devices which replace the existing planar MISFETs are being vigorously promoted.
A FINFET is one of the above new structure devices and a three-dimensional MISFET which is different from planar MISFETs. In the FINFET, a FET is formed over a semiconductor layer in the shape of a thin plate which protrudes from the main surface of a semiconductor substrate, so there is a problem that the heat generated during operation of the FET is hardly transferred to the semiconductor substrate.
For example, Japanese Unexamined Patent Application Publication No. 2009-16418 discloses a technique concerning heat dissipation of FINFETs.